Recently, there has been widely employed a gate monolithic configuration in which a gate driver made of amorphous silicon is formed on a liquid crystal panel in order to reduce costs. The gate monolithic is also referred to as gate driverless, panel-built-in driver, gate-in panel etc.
FIG. 27 shows a configuration of such a gate driver (scan drive circuit) described in Patent Literature 1.
The gate driver is configured such that a plurality of unit stages SRC11, SRC12, . . . SRC1N, and SRC1D are serially connected with one another. A clock is inputted to a clock terminal CK of each unit stage in such a manner that a first clock CKV is inputted to an odd stage and a second clock CKVB is inputted to an even stage. The phase of the first clock CKV is reverse to that of the second clock CKVB. An output terminal OUT outputs a gate signal (G1, G2, . . . , GN, and GD) to be supplied to a gate bus line.
A scan start signal STV is inputted to a first input terminal IN1 of a first unit stage SRC11. To first input terminals IN1 of subsequent stages SRC12, SRC13, . . . , SRC1N, and SRC1D are inputted gate signals outputted from respectively previous stages. To second input terminals IN2 of the unit stages SRC11, SRC12, . . . , and SRC1N are inputted gate signals outputted from respectively next unit stages. Each unit stage includes a first voltage terminal VOFF.